After manufacture and deployment, electronic systems may suffer from obsolescence or errors in the system's manufacture and design. It is therefore appealing to create a configurable electronic system so that any errors discovered when the device is already in the field can be modified. Such modifications are called field updates and are highly desirable in modern electronics owing to the increasingly rapid rate of technological improvement. Set against this desirable aspect is the fact that making a circuit configurable comes with an associated cost in complexity, area, and power. At one end of the configurability tradeoff is mask Read Only Memory (ROM). Mask ROM is formed as part of the device during manufacture and cannot be altered which makes it the cheapest but least configurable type of electronic memory. In contrast to ROM, Programmable Read Only Memory (PROM) does not hold data until the memory is programmed at some point after manufacture. Often times, PROM can additionally be erased and reprogrammed after it is given its initial programmed state. An equivalent amount of ROM will consume considerably less area than PROM. In addition, the inherently stable nature of non-configurable memory leads to ROM being an extremely reliable storage medium. It is therefore highly beneficial from a cost and reliability perspective to house core data in ROM, while it is beneficial for device functionality and adaptability to store such data in configurable memory.
The use of configurable memory for storing operation code is known in the prior art. For example, in U.S. Pat. No. 6,031,867 to Johnson the firmware of a modem can be upgraded because it is all stored in electrically erasable programmable read only memory (EEPROM). Therefore, the operating code can be erased and reprogrammed to update the devices functionality or to fix system errors. There is a wealth of material in the prior art that utilizes similar approaches. Much of the prior art is focused on swapping the old code with the updated code and assuring that the swap has been done correctly. Such a solution provides for full configurability of the electronic system but at considerably high cost in terms of area consumed by the configurable memory arrays.
Another technique for providing configurability to an electronic system is to include an ancillary block of programmable memory that can be called to substitute for the replaced ROM code. Such a combination can emulate the functionality of the original code storage device while providing an updated version of the code to the system. When the computational system requests information from the original code storage device a routing or modification system will intercept or alter the request and provide the corresponding updated code in its place. A general example of this method is described in U.S. Pat. No. 5,949,703 to Shibata. In this patent two ancillary blocks of PROM are utilized wherein one block is used to store the remapping information and the other block is used to store data that will replace defective or incorrect data in the ROM. The apparatus that implements this method is broadly referred to as a virtual memory. The portion of the system that translates the virtual address into the actual read address is often called the arbiter. The benefit of such an approach is that the original code can still be stored on a cheap ROM memory while a small portion of more expensive configurable memory is available in case of design errors or required upgrades.
In U.S. Pat. No. 4,376,300 to Tsang a content-addressable memory (CAM) is used to replace defective entries in a write/read memory array with a redundant write/read array of memory. In the Tsang circuit, a block of memory with an equivalent number of word lines as the main blocks of memory can emulate individual word lines. The purpose of the emulation in this patent is to repair defective memories and it is applied to similar memory blocks. The CAM addresses are stored in Non-volatile Memory (NVM) because the defective memories are permanently replaced. The CAM is utilized to conduct the emulated addressing scheme. A CAM is a hardware implementation of a lookup algorithm that is usually comprised of write/read memory such as static random access memory (SRAM) and is able to complete a search operation in a single clock cycle. This produces a significant speed improvement over software-based lookup methods. The speed advantage of a CAM is accomplished by adding comparison circuitry to every cell of its hardware memory. The CAM will receive a digital code and will check to see if the CAM contains a matching code. If the received code matches one of the stored codes, the CAM will output a different code that corresponds to the code that was matched.
Virtual memories can be used to provide for system upgrades using the same technique as applied in the Tsang circuit. U.S. Pat. No. 6,530,005 to Koschella describes a system level implementation wherein a circuit monitors requests to the original memory and retrieves replacement data when a request for upgraded data is detected. In the Koschella circuit the arbiter and replacement data registers are connected directly to the address and data lines of the circuit and are programmed to replace the original data on receipt of specific addresses on the address lines. A similar technique is described in U.S. Pat. No. 7,243,205 to Kimelman.